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Disambiguation of "Casseau, Emmanuel"

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Run-Time Coarse-Grained Hardware Mitigation for Multiple Faults on VLIW Processors.

, , , and . DASIP, page 23-28. IEEE, (2019)

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Emmanuel Lule

Emmanuel Fiolitakis

Emmanuel Wiemer

Emmanuel Fiolitakis

Emmanuel Biris

 

Other publications of authors with the same name

An efficient algorithm for custom instruction enumeration., and . ACM Great Lakes Symposium on VLSI, page 187-192. ACM, (2011)Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis., , and . IEEE Trans. Very Large Scale Integr. Syst., 16 (11): 1454-1464 (2008)A formal method for hardware IP design and integration under I/O and timing constraints., , , , and . ACM Trans. Embed. Comput. Syst., 5 (1): 29-53 (2006)Energy-Aware Partial-Duplication Task Mapping Under Real-Time and Reliability Constraints., , , and . SAMOS, volume 12471 of Lecture Notes in Computer Science, page 213-227. Springer, (2020)Run-Time Coarse-Grained Hardware Mitigation for Multiple Faults on VLIW Processors., , , and . DASIP, page 23-28. IEEE, (2019)Cache management in MASCARA-FPGA: from coalescing heuristic to replacement policy., , , and . DaMoN, page 11:1-11:5. ACM, (2022)Surround the Nonlinearity: Inserting Foldable Convolutional Autoencoders to Reduce Activation Footprint., , , and . ICCV (Workshops), page 1399-1403. IEEE, (2023)Bit-Width Aware High-Level Synthesis for Digital Signal Processing Systems., , and . SoCC, page 175-178. IEEE, (2006)Evaluation of Fault Tolerant Online Scheduling Algorithms for CubeSats., , and . DSD, page 622-629. IEEE, (2020)Design Exploration and HW/SW Rapid Prototyping for Real-Time System Design., , and . IEEE International Workshop on Rapid System Prototyping, page 240-243. IEEE Computer Society, (2005)