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First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 Cycles.

Y. Chen, Y. Liu, Z. Zhao, W. Hsieh, J. Lee, C. Tu, B. Huang, J. Wang, S. Chueh, Y. Xing, G. Chen, H. Chou, D. Woo, M. Lee, and C. Liu. VLSI Technology and Circuits, page 1-2. IEEE, (2023)

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Chun Liu

Yi Liu

Yi-Chun Yen

Yi Chun Shi

Yi-chun Chen

Other publications of authors with the same name

Rethinking I/O request management over eMMC-based solid-state drives.C. Tsao, C. Liu, C. Ho, T. Wang, P. Huang, Y. Chang, and T. Kuo. RACS, page 451-456. ACM, (2015)Extremely High-κ Hf0.2Zr0.8O2 Gate Stacks Integrated into Ge0.95Si0.05 Nanowire and Nanosheet nFETs Featuring Respective Record Ion per Footprint of 9200μA/μm and Record Ion per Stack of 360μA at VOV=VDS=0.5V.Y. Liu, Y. Chen, Y. Chen, H. Lin, W. Hsieh, C. Tu, B. Huang, W. Chen, C. Cheng, S. Chueh and 1 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Dual-Mode All-Digital Baseband Receiver With a Feed-Forward and Shared-Memory Architecture for Dual-Standard Over 60 GHz NLOS Channel.C. Liu, M. Sie, E. Leong, Y. Yao, C. Jen, W. Liu, C. Wu, and S. Jou. IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (3): 608-618 (2017)A 802.15.3c/802.11ad compliant 24 Gb/s FFT processor for 60 GHz communication systems.H. Davila, C. Liu, W. Liu, S. Huang, S. Jou, and S. Chen. SoCC, page 44-48. IEEE, (2015)User Alignment via Structural Interaction and Propagation.A. Cheng, C. Liu, C. Zhou, J. Tan, and L. Guo. IJCNN, page 1-8. IEEE, (2018)Deep Learning Model to Recognize the Different Progression Condition Patterns of Manual Wheelchair Users for Prevention of Shoulder Pain.J. Tsai, Y. Jan, B. Liau, C. Chen, P. Chen, C. Lin, Y. Liu, and C. Lung. AHFE (16), volume 967 of Advances in Intelligent Systems and Computing, page 3-13. Springer, (2019)Prolonging 3D NAND SSD lifetime via read latency relaxation.C. Liu, Y. Lee, M. Jung, M. Kandemir, and W. Choi. ASPLOS, page 730-742. ACM, (2021)Centaur: A Novel Architecture for Reliable, Low-Wear, High-Density 3D NAND Storage.C. Liu, J. Kotra, M. Jung, and M. Kandemir. SIGMETRICS (Abstracts), page 93-94. ACM, (2020)First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 Cycles.Y. Chen, Y. Liu, Z. Zhao, W. Hsieh, J. Lee, C. Tu, B. Huang, J. Wang, S. Chueh, Y. Xing and 5 other author(s). VLSI Technology and Circuits, page 1-2. IEEE, (2023)Interference measurement and analysis of full-duplex wireless system in 60 GHz band.H. Yang, Y. He, C. Jen, C. Liu, S. Jou, X. Yin, M. Ma, and B. Jiao. APCCAS, page 273-276. IEEE, (2016)

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Disambiguation of "Liu, Yi-Chun"

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First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 Cycles.

Please choose a person to relate this publication to

Chun Liu

Yi Liu

Yi-Chun Yen

Yi Chun Shi

Yi-chun Chen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Liu, Yi-Chun"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 Cycles.

Please choose a person to relate this publication to

Chun Liu

Yi Liu

Yi-Chun Yen

Yi Chun Shi

Yi-chun Chen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 Cycles.