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Thermal/performance trade-off in network-on-chip architectures., , and . ISSoC, page 1-8. IEEE, (2012)All-Digital Energy-Constrained Controller for General-Purpose Accelerators and CPUs., , and . IEEE Embed. Syst. Lett., 12 (1): 17-20 (2020)Exploring power reliability and performance aspects in on-chip networks for multi-cores.. Polytechnic University of Milan, Italy, (2014)Evaluating the Trade-offs in the Hardware Design of the LEDAcrypt Encryption Functions., , , , and . ICECS, page 739-742. IEEE, (2019)Dynamic Power Consumption of the Full Posit Processing Unit: Analysis and Experiments., , , , , , , and . PARMA-DITAM, volume 107 of OASIcs, page 6:1-6:11. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, (2023)A Low-Overhead Heuristic for Mixed Workload Resource Partitioning in Cluster-Based Architectures., , and . ARCS, volume 7179 of Lecture Notes in Computer Science, page 86-97. Springer, (2012)CUTBUF: Buffer Management and Router Design for Traffic Mixing in VNET-Based NoCs., , and . IEEE Trans. Parallel Distributed Syst., 27 (6): 1603-1616 (2016)Sensor-wise methodology to face NBTI stress of NoC buffers., and . DATE, page 1038-1043. EDA Consortium San Jose, CA, USA / ACM DL, (2013)On the use of hardware accelerators in QC-MDPC code-based cryptography., , , , and . CF, page 193-194. ACM, (2022)The MANGO FET-HPC Project: An Overview., , , , , , , , and . CSE, page 351-354. IEEE Computer Society, (2015)