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Disambiguation of "Gupta, Sumeet Kumar"

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Ferroelectric Transistor based Non-Volatile Flip-Flop.

, , , , , and . ISLPED, page 10-15. ACM, (2016)

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Ashutosh Kumar Gupta

Ajay Kumar Gupta

Manoj Kumar Gupta

Surender Kumar Gupta

Rajender Kumar Gupta

 

Other publications of authors with the same name

Device/circuit interactions at 22nm technology node., , and . DAC, page 97-102. ACM, (2009)High-performance low-energy STT MRAM based on balanced write scheme., , and . ISLPED, page 9-14. ACM, (2012)ROBIN: Monolithic-3D SRAM for Enhanced Robustness with In-Memory Computation Support., , , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (7): 2533-2545 (2019)Read-enhanced spin memories augmented by phase transition materials (Invited)., and . MWSCAS, page 993-996. IEEE, (2017)Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed., , , , , , , and . ISVLSI, page 296-301. IEEE Computer Society, (2014)Comparative Evaluation of Memory Technologies for Synaptic Crossbar Arrays- Part 2: Design Knobs and DNN Accuracy Trends., , and . CoRR, (2024)Layout-aware optimization of stt mrams., , , and . DATE, page 1455-1458. IEEE, (2012)Future cache design using STT MRAMs for improved energy efficiency: devices, circuits and architecture., , , , and . DAC, page 492-497. ACM, (2012)Valley-Coupled-Spintronic Non-Volatile Memories with Compute-In-Memory Support., , , , , , , , and . CoRR, (2019)An area efficient low-voltage 6-T SRAM cell using stacked silicon nanowires., , , and . ICICDT, page 117-120. IEEE, (2018)