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Power optimization of technology-dependent circuits based on symbolic computation of logic implications., , and . ACM Trans. Design Autom. Electr. Syst., 5 (3): 267-293 (2000)Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers., , , , and . ACM Trans. Design Autom. Electr. Syst., 4 (4): 351-375 (1999)Power-aware clock tree planning., , and . ISPD, page 138-147. ACM, (2004)An open-source framework for formal specification and simulation of electrical energy systems., , , , and . ISLPED, page 287-290. ACM, (2014)Reducing leakage power by accounting for temperature inversion dependence in dual-Vt synthesized circuits., , , and . ISLPED, page 217-220. ACM, (2008)Limited intra-word transition codes: an energy-efficient bus encoding for LCD display interfaces., , , and . ISLPED, page 206-211. ACM, (2004)Energy-efficient data scrambling on memory-processor interfaces., , , , and . ISLPED, page 26-29. ACM, (2003)A novel architecture for power maskable arithmetic units., , , , , and . ACM Great Lakes Symposium on VLSI, page 136-140. ACM, (2003)Power modeling and characterization of Graphene-based logic gates., , , and . PATMOS, page 223-226. IEEE, (2013)A fully standard-cell delay measurement circuit for timing variability detection., , , and . PATMOS, page 239-242. IEEE, (2013)