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A 128-channel neural stimulation and recording ASIC for scalable cortical visual prosthesis.

, , , , and . ESSCIRC, page 301-304. IEEE, (2023)

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An AC-Coupled 1st-Order Δ-ΔΣ Readout IC for Area-Efficient Neural Signal Acquisition., , , , , , and . IEEE J. Solid State Circuits, 58 (4): 949-960 (2023)A time-based, digitally intensive circuit and system architecture for wireless neural recording with high dynamic range., , and . MWSCAS, page 1-4. IEEE, (2016)One Raman DTS Interrogator Channel Supports a Dual Separate Path to Realize Spatial Duplexing., , , , , , and . Sensors, 24 (16): 5277 (August 2024)A 0-to-35mA NMOS Capacitor-Less LDO with Dual-Loop Regulation Achieving 3ns Response Time and 1pF-to-10nF Loading Range., , , , , and . ESSCIRC, page 253-256. IEEE, (2023)A compact Gm-C filter architecture with an ultra-low corner frequency and high ground-noise rejection., , , and . BioCAS, page 318-321. IEEE, (2013)An implantable microsystem for studying the Parkinson's Disease., , , , , , , , , and 2 other author(s). APCCAS, page 92-95. IEEE, (2012)A 128-channel neural stimulation and recording ASIC for scalable cortical visual prosthesis., , , , and . ESSCIRC, page 301-304. IEEE, (2023)A 128-Channel AC-Coupled 1st-order Δ-Δ∑ IC for Neural Signal Acquisition., , , , , , and . VLSI Technology and Circuits, page 60-61. IEEE, (2022)