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Disambiguation of "Iwagaki, Tsuyoshi"

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State assignment for fault tolerant stochastic computing with linear finite state machines.

, , , and . ITC-Asia, page 156-161. IEEE, (2017)

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Tsuyoshi Takagi

Tsuyoshi Matsuda

 

Other publications of authors with the same name

An Empirical Approach to RTL Scan Path Design Focusing on Structural Interpretation in Logic Synthesis., , , and . ITC-Asia, page 55-60. IEEE, (2019)Broadside Transition Test Generation for Partial Scan Circuits through Stuck-at Test Generation., , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 301-316. Springer, (2006)Logic simplification by minterm complement for error tolerant application., , , and . ICCD, page 94-100. IEEE Computer Society, (2015)A Pseudo-Boolean Technique for Generating Compact Transition Tests with All-Output-Propagation Properties., and . DELTA, page 293-296. IEEE Computer Society, (2010)Safe clocking register assignment in datapath synthesis., , and . ICCD, page 120-127. IEEE Computer Society, (2008)Compact and accurate stochastic circuits with shared random number sources., , , , and . ICCD, page 361-366. IEEE Computer Society, (2014)Scheduling algorithm in datapath synthesis for long duration transient fault tolerance., , , , and . DFT, page 128-133. IEEE Computer Society, (2014)Acceleration of transition test generation for acyclic sequential circuits utilizing constrained combinational stuck-at test generation., , and . ETS, page 48-53. IEEE Computer Society, (2005)On the derivation of a minimum test set in high quality transition testing., and . LATW, page 1-6. IEEE, (2009)Efficient path delay test generation based on stuck-at test generation using checker circuitry., , , and . ICCAD, page 418-423. IEEE Computer Society, (2007)