( en | de | ru )

 

Disambiguation of "Leblebici, Yusuf"

Author of the publication

copydeleteadd this publication to your clipboard
Ultra-low power mixed-signal design platform using subthreshold source-coupled circuits.

, and . DATE, page 711-716. IEEE Computer Society, (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Yusuf

Erhan Leblebici

Nigem Yusuf

Faisal Yusuf

Sherif Yusuf

 

Other publications of authors with the same name

Co-Design of ReRAM Passive Crossbar Arrays Integrated in 180 nm CMOS Technology., , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (3): 339-351 (2016)Integrating bio-sensing functions on CMOS chips., , , , , , and . APCCAS, page 548-551. IEEE, (2010)Load Optimization of an Inductive Power Link for Remote Powering of Biomedical Implants., , , , , , and . ISCAS, page 533-536. IEEE, (2009)Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity., , and . ISCAS (5), page 453-456. IEEE, (2003)Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage., and . ISCAS, page 1871-1874. IEEE, (2007)Robust and fault-tolerant circuit design for nanometer-scale devices and single-electron transistors., and . ISCAS (3), page 685-688. IEEE, (2004)Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library., , , , , and . DAC, page 1014-1019. ACM, (2011)Physical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors., , , and . DAC, page 42-47. ACM, (2012)Non-filamentary non-volatile memory elements as synapses in neuromorphic systems., , , , , , , , , and . NVMTS, page 1-6. IEEE, (2019)A Predictable Communication Scheme for Embedded Multiprocessor Systems., , , and . VLSI-SoC, page 152-157. IEEE, (2006)