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Disambiguation of "Amano, Hideharu"

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Enormous-Scale Quantum State Vector Calculation with FPGA-accelerated SATA storages.

, , , , , and . ICFPT, page 288-289. IEEE, (2023)

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Hideharu Umehara

Kyoko Amano

Yu Amano

Shun'ichi Amano

 

Other publications of authors with the same name

Low-Latency Low-Energy Memory-Cube Networks using Dual-Voltage Datapaths., , , , , , and . PDP, page 143-147. IEEE, (2021)A Case for Low-Latency Network-on-Chip using Compression Routers., , , and . PDP, page 134-142. IEEE, (2021)An efficient compilation of coarse-grained reconfigurable architectures utilizing pre-optimized sub-graph mappings., , and . PDP, page 1-9. IEEE, (2022)Level-Shifter-Less Approach for Multi-VDD SoC Design to Employ Body Bias Control in FD-SOI., , , , and . VLSI-SoC (Selected Papers), volume 500 of IFIP Advances in Information and Communication Technology, page 1-21. Springer, (2017)Board Allocation Algorithm for the Resource Management System of FiC., , and . MCSoC, page 218-224. IEEE, (2023)Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops., , , , , , , , and . MCSoC, page 273-280. IEEE, (2021)Distance Aware Compression for Low Latency High Bandwidth Interconnection Network., , and . MCSoC, page 361-367. IEEE, (2022)Towards Unification of Accelerated Computing and Interconnection For Extreme-Scale Computing., , , , , , and . ARC, volume 9040 of Lecture Notes in Computer Science, page 463-474. Springer, (2015)Dynamic VDD Switching Technique and Mapping Optimization in Dynamically Reconfigurable Processor for Efficient Energy Reduction., , , , , and . ARC, volume 6578 of Lecture Notes in Computer Science, page 230-241. Springer, (2011)The impact of output selection function on adaptive routing., , , and . CATA, page 241-246. ISCA, (2001)