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Model driven architecture as a facilitator for automatic code generation.

, and . IASTED Conf. on Software Engineering, page 505-510. IASTED/ACTA Press, (2004)

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VCDC: The Virtualized Complicated Device Controller., and . ECRTS, volume 76 of LIPIcs, page 5:1-5:21. Schloss Dagstuhl - Leibniz-Zentrum für Informatik, (2017)Many suspensions, many problems: a review of self-suspending tasks in real-time systems., , , , , , , , , and 3 other author(s). Real Time Syst., 55 (1): 144-207 (2019)I/O-GUARD: Hardware/Software Co-Design for I/O Virtualization with Guaranteed Real-time Performance., , , , , and . DAC, page 1159-1164. IEEE, (2021)BlueVisor: A Scalable Real-Time Hardware Hypervisor for Many-Core Embedded Systems., , and . RTAS, page 75-84. IEEE Computer Society, (2018)Predictable and Efficient Virtual Addressing for Safety-Critical Real-Time Systems., and . ECRTS, page 183-190. IEEE Computer Society, (2001)Mechanisms for Enhancing the Flexibility and Utility of Hard Real-Time Systems., , and . RTSS, page 12-21. IEEE Computer Society, (1994)Re-Thinking Mixed-Criticality Architecture for Automotive Industry., , , , , , and . ICCD, page 510-517. IEEE, (2020)Pythia-MCS: Enabling Quarter-Clairvoyance in I/O-Driven Mixed-Criticality Systems., , , , and . RTSS, page 38-50. IEEE, (2020)Synthesis of the SR programming language for complex FPGAs., and . FPL, page 617-621. IEEE, (2009)BlueScale: a scalable memory architecture for predictable real-time computing on highly integrated SoCs., , , , , and . DAC, page 1261-1266. ACM, (2022)