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A 2.5-8Gb/s transceiver with 5-tap DFE and Second order CDR against 28-inch channel and 5000ppm SSC in 40nm CMOS technology., , , , , , , , , and 7 other author(s). CICC, page 1-4. IEEE, (2010)On the Formalism and Properties of Timing Analyses in Real-Time Embedded Systems., , , , and . A Journey of Embedded and Cyber-Physical Systems, page 37-55. Springer, (2021)Uniprocessor Scheduling Strategies for Self-Suspending Task Systems., , , and . RTNS, page 119-128. ACM, (2016)State of the art for scheduling and analyzing self-suspending sporadic real-time tasks., , , and . RTCSA, page 1-10. IEEE Computer Society, (2017)Analysis of Impulsive Interference in Digital Audio Broadcasting Systems in Electric Vehicles., , , , , and . CoRR, (2024)A 56Gb/s PAM-4 Receiver with Voltage Pre-Shift CTLE and 10-Tap DFE of Tap-1 Speculation in 7nm FinFET., , , , , and . VLSI Circuits, page 272-. IEEE, (2019)TFRP: An efficient microaggregation algorithm for statistical disclosure control., , and . J. Syst. Softw., 80 (11): 1866-1878 (2007)A 1 Tbit/s Bandwidth 1024 b PLL/DLL-Less eDRAM PHY Using 0.3 V 0.105 mW/Gbps Low-Swing IO for CoWoS Application., , , , , , , , , and 5 other author(s). IEEE J. Solid State Circuits, 49 (4): 1063-1074 (2014)Resource-Oriented Partitioned Scheduling in Multiprocessor Systems: How to Partition and How to Share?, , and . RTSS, page 111-122. IEEE Computer Society, (2016)A 4-to-18GHz Active Poly Phase Filter Quadrature Clock Generator with Phase Error Correction in 5nm CMOS., , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2020)