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A Dataflow Pipelining Architecture for Tile Segmentation with a Sparse MobileNet on an FPGA.

, , , and . FPT, page 267-270. IEEE, (2019)

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Filter-Wise Pruning Approach to FPGA Implementation of Fully Convolutional Network for Semantic Segmentation., , and . ARC, volume 11444 of Lecture Notes in Computer Science, page 371-386. Springer, (2019)A Dataflow Pipelining Architecture for Tile Segmentation with a Sparse MobileNet on an FPGA., , , and . FPT, page 267-270. IEEE, (2019)FPGA-Based Training Accelerator Utilizing Sparseness of Convolutional Neural Network., , , , , and . FPL, page 180-186. IEEE, (2019)FPGA-Based Inter-layer Pipelined Accelerators for Filter-Wise Weight-Balanced Sparse Fully Convolutional Networks with Overlapped Tiling., , and . J. Signal Process. Syst., 93 (5): 499-512 (2021)Fast Monocular Depth Estimation on an FPGA., , , , , and . IPDPS Workshops, page 143-146. IEEE, (2020)Real-Time Multi-Pedestrian Detection in Surveillance Camera using FPGA., , and . FPL, page 424-425. IEEE, (2019)SENTEI: Filter-Wise Pruning with Distillation towards Efficient Sparse Convolutional Neural Network Accelerators., , , , and . IEICE Trans. Inf. Syst., 103-D (12): 2463-2470 (2020)Many Universal Convolution Cores for Ensemble Sparse Convolutional Neural Networks., , , , and . MCSoC, page 93-100. IEEE, (2019)FPGA-based Accurate Pedestrian Detection with Thermal Camera for Surveillance System., , , , and . ReConFig, page 1-5. IEEE, (2019)An FPGA Implementation of Real-Time Object Detection with a Thermal Camera., , , and . FPL, page 413-414. IEEE, (2019)