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Integrated routing resource assignment for RLC crosstalk minimization.

, , , and . ISCAS (2), page 1871-1874. IEEE, (2005)

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A New Buffer Planning Algorithm Based on Room Resizing., , , and . EUC, volume 3824 of Lecture Notes in Computer Science, page 291-299. Springer, (2005)A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design., , , , and . SAMOS, volume 3553 of Lecture Notes in Computer Science, page 344-353. Springer, (2005)VLSI Module Placement with Pre-Placed Modules and with Consideration of Congestion Using Solution Space Smoothing., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 86-A (12): 3136-3147 (2003)Improved multilevel routing with redundant via placement for yield and reliability., , , and . ACM Great Lakes Symposium on VLSI, page 143-146. ACM, (2005)Physical aware clock skew rescheduling., , and . ACM Great Lakes Symposium on VLSI, page 473-476. ACM, (2007)A Min-area Solution to Performance and RLC Crosstalk Driven Global Routing Problem., , , , , , and . ASP-DAC, page 115-120. ACM Press, (2005)Register placement for low power clock network., , , , , , and . ASP-DAC, page 588-593. ACM Press, (2005)Logic and Layout Aware Voltage Island Generation for Low Power Design., , , and . ASP-DAC, page 666-671. IEEE Computer Society, (2007)DpRouter: A Fast and Accurate Dynamic-Pattern-Based Global Routing Algorithm., , , , , and . ASP-DAC, page 256-261. IEEE Computer Society, (2007)A Novel Tour Construction Heuristic for Traveling Salesman Problem Using LFF Principle., , , , and . JCIS, Atlantis Press, (2006)