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Disambiguation of "Hong, Xianlong"

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Logic and Layout Aware Voltage Island Generation for Low Power Design.

, , , and . ASP-DAC, page 666-671. IEEE Computer Society, (2007)

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Xin Hong

Kang-hun Hong

Jung-soo Hong

Moon-Shin Hong

Youn-Ho Hong

 

Other publications of authors with the same name

Timing-driven global routing with efficient buffer insertion., , and . ISCAS (3), page 2449-2452. IEEE, (2005)Interconnect delay optimization via high level re-synthesis after floorplanning., , and . ISCAS (6), page 5641-5644. IEEE, (2005)Performance-Driven Steiner Tree Algorithm for Global Routing., , , , and . DAC, page 177-181. ACM Press, (1993)Leakage power optimization for clock network using dual-Vth technology., , and . ISCAS, page 2769-2772. IEEE, (2008)VLSI block placement with alignment constraints based on corner block list., , , , and . ISCAS (6), page 6222-6225. IEEE, (2005)Evaluating a bounded slice-line grid assignment in O(nlogn) time., , , , , , and . ISCAS (4), page 708-711. IEEE, (2003)Buffer planning based on block exchanging., , , and . ISCAS, IEEE, (2006)A New Buffer Planning Algorithm Based on Room Resizing., , , and . EUC, volume 3824 of Lecture Notes in Computer Science, page 291-299. Springer, (2005)A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design., , , , and . SAMOS, volume 3553 of Lecture Notes in Computer Science, page 344-353. Springer, (2005)Power driven placement with layout aware supply voltage assignment for voltage island generation in Dual-Vdd designs., , , and . ASP-DAC, page 582-587. IEEE, (2006)