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VLSI floorplan generation and area optimization using AND-OR graph search.

, , and . VLSI Design, page 370-375. IEEE Computer Society, (1995)

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Determination of Minutiae Scores for Fingerprint Image Applications., , , , , and . ICVGIP, Allied Publishers Private Limited, (2002)Isomorph-Redundancy in Sequential Circuits., , and . IEEE Trans. Computers, 49 (9): 992-997 (2000)Area(number)-balanced hierarchy of staircase channels with minimum crossing nets., , , and . ISCAS (5), page 395-398. IEEE, (2001)Fast Estimation of Area-Coverage for Wireless Sensor Networks Based on Digital Geometry., , , and . IEEE Trans. Multi Scale Comput. Syst., 3 (3): 166-180 (2017)Enumeration of Shortest Isothetic Paths Inside a Digital Object., , and . PReMI, volume 9124 of Lecture Notes in Computer Science, page 105-115. Springer, (2015)On the Testable Design of Bilateral Bit-Level Systolic Arrays., and . ITC, page 1024-1033. IEEE Computer Society, (1991)A heuristic method for obstacle avoiding group Steiner tree construction., , , , and . SLIP, page 21. ACM, (2012)On Finding Shortest Isothetic Path inside a Digital Object., , , and . IWCIA, volume 7655 of Lecture Notes in Computer Science, page 1-15. Springer, (2012)Finding the Orthogonal Hull of a Digital Object: A Combinatorial Approach., , , and . IWCIA, volume 4958 of Lecture Notes in Computer Science, page 124-135. Springer, (2008)Construction of isothetic covers of a digital object: A combinatorial approach., , and . J. Vis. Commun. Image Represent., 21 (4): 295-310 (2010)