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Disambiguation of "Markulic, Nereo"

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A Self-Calibrated 16GHz Subsampling-PLL-Based 30s Fast Chirp FMCW Modulator with 1.5GHz Bandwidth and 100kHz rms Error.

, , , and . ISSCC, page 408-410. IEEE, (2019)

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Nereo Kalebi

 

Other publications of authors with the same name

A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion., , , , , , and . ISSCC, page 58-60. IEEE, (2019)A Fractional-n subsampling PLL based on a digital-to-time converter., , , and . MIPRO, page 66-71. IEEE, (2016)Calibration Techniques for Optimizing Performance of High-Speed ADCs., , , and . CICC, page 1-8. IEEE, (2023)A Self-Calibrated 16GHz Subsampling-PLL-Based 30s Fast Chirp FMCW Modulator with 1.5GHz Bandwidth and 100kHz rms Error., , , and . ISSCC, page 408-410. IEEE, (2019)A 16-GHz Background-Calibrated Duty-Cycled FMCW Charge-Pump PLL., , , and . IEEE J. Solid State Circuits, 59 (6): 1684-1696 (June 2024)A 16GHz, $41kHz_rms$ Frequency Error, Background-Calibrated, Duty-Cycled FMCW Charge-Pump PLL., , , , , , and . ISSCC, page 74-75. IEEE, (2023)22.5 A 42GS/s 7b 16nm Massively Time-Interleaved Slope-ADC., , , , , , , and . ISSCC, page 396-398. IEEE, (2024)17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp Bandwidth., , , , , , and . ISSCC, page 278-280. IEEE, (2020)A 4-GS/s 10-ENOB 75-mW Ringamp ADC in 16-nm CMOS With Background Monitoring of Distortion., , , , , , and . IEEE J. Solid State Circuits, 56 (8): 2360-2374 (2021)An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8dB SFDR Improvement over 4th Nyquist Zone in 1GS/s ADC., , , , , , , , and . VLSI Circuits, page 1-2. IEEE, (2021)