Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp Bandwidth.

P. Renukaswamy, N. Markulic, S. Park, A. Kankuppe, Q. Shi, P. Wambacq, and J. Craninckx. ISSCC, page 278-280. IEEE, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Anirudh Ramachandran

Other publications of authors with the same name

A 67-mW D-Band FMCW I/Q Radar Receiver With an N-Path Spillover Notch Filter in 28-nm CMOS.A. Kankuppe, S. Park, K. Vaesen, D. Park, B. van Liempd, S. Sinha, P. Wambacq, and J. Craninckx. IEEE J. Solid State Circuits, 57 (7): 1982-1996 (2022)17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp Bandwidth.P. Renukaswamy, N. Markulic, S. Park, A. Kankuppe, Q. Shi, P. Wambacq, and J. Craninckx. ISSCC, page 278-280. IEEE, (2020)Programmable memristor emulator ASIC for biologically inspired memristive learning.R. Ranjan, P. Ponce, A. Kankuppe, B. John, L. Saleh, D. Schroeder, and W. Krautschneider. TSP, page 261-264. IEEE, (2016)A D-Band Low-Power and High-Efficiency Frequency Multiply-by-9 FMCW Radar Transmitter in 28-nm CMOS.S. Park, D. Park, K. Vaesen, A. Kankuppe, S. Sinha, B. van Liempd, P. Wambacq, and J. Craninckx. IEEE J. Solid State Circuits, 57 (7): 2114-2129 (2022)A 28-nm-CMOS Based 145-GHz FMCW Radar: System, Circuits, and Characterization.A. Visweswaran, K. Vaesen, M. Glassee, A. Kankuppe, S. Sinha, C. Desset, T. Gielen, A. Bourdoux, and P. Wambacq. IEEE J. Solid State Circuits, 56 (7): 1975-1993 (2021)A 67mW D-band FMCW I/Q Radar Receiver with an N-path Spillover Notch Filter in 28nm CMOS.A. Kankuppe, S. Park, K. Vaesen, D. Park, B. van Liempd, P. Wambacq, and J. Craninckx. ESSCIRC, page 471-474. IEEE, (2021)

BibSonomy

Disambiguation of "Kankuppe, Anirudh"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp Bandwidth.

Please choose a person to relate this publication to

Anirudh Ramachandran

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Kankuppe, Anirudh"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp Bandwidth.

Please choose a person to relate this publication to

Anirudh Ramachandran

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp Bandwidth.