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Disambiguation of "Ohtake, Satoshi"

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A DFT Method for RTL Data Paths Based on Partially Strong Testability to Guarantee Complete Fault Efficiency.

, , , and . Asian Test Symposium, page 306-311. IEEE Computer Society, (2005)

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Satoshi Ejima

Satoshi Okawa

Satoshi Otomo

Satoshi Nishida

Satoshi Murayama

 

Other publications of authors with the same name

A DFT Method for RTL Data Paths Based on Partially Strong Testability to Guarantee Complete Fault Efficiency., , , and . Asian Test Symposium, page 306-311. IEEE Computer Society, (2005)Design for Testability Based on Single-Port-Change Delay Testing for Data Paths., , , and . Asian Test Symposium, page 254-259. IEEE Computer Society, (2005)Delay Testing: Improving Test Quality and Avoiding Over-testing., , and . Inf. Media Technol., 6 (4): 1053-1066 (2011)A Method of Diagnostic Test Generation for Transition Faults., and . PRDC, page 273-278. IEEE Computer Society, (2015)A Synthesis Method to Alleviate Over-Testing of Delay Faults Based on RTL Don't Care Path Identification., , , and . VTS, page 71-76. IEEE Computer Society, (2009)Vibration Measurement of Signal Bonds for Shinkansen., and . ICCE, page 1-5. IEEE, (2021)New DFT Techniques of Non-Scan Sequential Circuits with Complete Fault Efficiency., , and . Asian Test Symposium, page 263-268. IEEE Computer Society, (1999)Broadside Transition Test Generation for Partial Scan Circuits through Stuck-at Test Generation., , and . VLSI-SoC (Selected Papers), volume 249 of IFIP, page 301-316. Springer, (2006)Factory Environment Monitoring: A Japanese Tea Manufacturer's Case., and . ICCE, page 1-3. IEEE, (2019)Fast false path identification based on functional unsensitizability using RTL information., , , and . ASP-DAC, page 660-665. IEEE, (2009)