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Disambiguation of "Rhew, Hyo-Gyuem"

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A 4nm 1.15TB/s HBM3 Interface with Resistor-Tuned Offset-Calibration and In-Situ Margin-Detection.

, , , , , , , , , , , , , , , , , and . ISSCC, page 406-407. IEEE, (2023)

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Jun-Won Hyon

Tae-In Hyon

Tahvo Hyötyläinen

Hyo Jeong Moon

Jung-Hyo Kim

 

Other publications of authors with the same name

A 22Gb/s, 10mm on-chip serial link over lossy transmission line with resistive termination., , and . ESSCIRC, page 233-236. IEEE, (2012)A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links., , , , , , , , , and 14 other author(s). VLSI Technology and Circuits, page 28-29. IEEE, (2022)An 8-bit 56GS/s 64x Time-Interleaved ADC with Bootstrapped Sampler and Class-AB Buffer in 4nm CMOS., , , , , , , , , and 17 other author(s). VLSI Technology and Circuits, page 168-169. IEEE, (2022)3.2 A 320mW 32Gb/s 8b ADC-based PAM-4 analog front-end with programmable gain control and analog peaking in 28nm CMOS., , , , , , , , and . ISSCC, page 58-59. IEEE, (2016)A wirelessly powered log-based closed-loop deep brain stimulation SoC with two-way wireless telemetry for treatment of neurological disorders., , , , , and . VLSIC, page 70-71. IEEE, (2012)A 64 Channel Programmable Closed-Loop Neurostimulator With 8 Channel Neural Amplifier and Logarithmic ADC., , , and . IEEE J. Solid State Circuits, 45 (9): 1935-1945 (2010)18.1 A 600Gb/s DP-QAM64 Coherent Optical Transceiver Frontend with 4x105GS/s 8b ADC/DAC in 16nm CMOS., , , , , , , , , and 9 other author(s). ISSCC, page 338-340. IEEE, (2024)A 4nm 1.15TB/s HBM3 Interface with Resistor-Tuned Offset-Calibration and In-Situ Margin-Detection., , , , , , , , , and 8 other author(s). ISSCC, page 406-407. IEEE, (2023)13.10 A 4nm 48Gb/s/wire Single-Ended NRZ Parallel Transceiver with Offset-Calibration and Equalization Schemes for Next-Generation Memory Interfaces and Chiplets., , , , , , , , , and 7 other author(s). ISSCC, page 250-252. IEEE, (2024)A 4nm 32Gb/s 8Tb/s/mm Die-to-Die Chiplet Using NRZ Single-Ended Transceiver With Equalization Schemes And Training Techniques., , , , , , , , , and 6 other author(s). ISSCC, page 114-115. IEEE, (2023)