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Disambiguation of "Chiou, Lih-Yih"

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A Variation-Tolerant Bitline Leakage Sensing Scheme for Near-Threshold SRAMs.

, , , , and . VLSI-DAT, page 1-4. IEEE, (2019)

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Franz Lihl

Min-Ching Chiou

Irmgard Chiout

Yiheyis Tasissa

Gabriel Yihune

 

Other publications of authors with the same name

A Reliable Delay-Based Physical Unclonable Function with Dark-Bit Avoidance., , and . ISCAS, page 1-4. IEEE, (2019)A Data-Traffic Aware Dynamic Power Management for General-Purpose Graphics Processing Units., , and . ISCAS, page 1-5. IEEE, (2019)Ultra-Low Standby Power SRAM with Adaptive Data-Retention-Voltage-Regulating Scheme., , , and . ISCAS, page 1-4. IEEE, (2018)A Reliable Near-Threshold Voltage SRAM-Based PUF Utilizing Weight Detection Technique., , , and . VLSI-DAT, page 1-4. IEEE, (2021)Energy-efficient adaptive clocking dual edge sense-amplifier flip-flop., , and . ISCAS, IEEE, (2006)A Variation-Tolerant Bitline Leakage Sensing Scheme for Near-Threshold SRAMs., , , , and . VLSI-DAT, page 1-4. IEEE, (2019)Synthesis of Application-Specific Highly-Efficient Multi-Mode Systems for Low-Power Applications., , and . DATE, page 10096-10103. IEEE Computer Society, (2003)Buffer size minimization method considering mix-clock domains and discontinuous data access., , , and . APCCAS, page 380-383. IEEE, (2012)Minimum convertible voltage analysis for ratioless and robust subthreshold level conversion., , and . ISCAS, page 2553-2556. IEEE, (2012)An ultra-low-power adaptive-body-bias control for subthreshold circuits., , and . VLSI-DAT, page 1-4. IEEE, (2014)