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Design and test strategies for microarchitectural post-fabrication tuning.

, , , and . ICCD, page 84-90. IEEE Computer Society, (2009)

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An Adaptive Issue Queue for Reduced Power at High Performance., , , , , and . PACS, volume 2008 of Lecture Notes in Computer Science, page 25-39. Springer, (2000)An Area-Efficient 8-Bit Single-Ended ADC With Extended Input Voltage Range., , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (11): 1549-1553 (2018)The design of a bloom filter hardware accelerator for ultra low power systems., and . ISLPED, page 371-376. ACM, (2009)Thread motion: fine-grained power management for multi-core systems., , and . ISCA, page 302-313. ACM, (2009)An Ultra Low Power System Architecture for Sensor Network Applications., , , , and . ISCA, page 208-219. IEEE Computer Society, (2005)ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency., , and . ISCA, page 191-202. IEEE Computer Society, (2008)Evaluating Techniques for Exploiting Instruction Slack., , and . ICCD, page 375-378. IEEE Computer Society, (2004)Control Techniques to Eliminate Voltage Emergencies in High Performance Processors., , and . HPCA, page 79-90. IEEE Computer Society, (2003)Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance., , , , , , , and . IEEE Micro, 26 (1): 119-129 (2006)CPUs, GPUs, and Hybrid Computing.. IEEE Micro, 31 (5): 4-6 (2011)