Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Fault-Tolerant Vertical Link Design for Effective 3D Stacking., , , , and . IEEE Comput. Archit. Lett., 10 (2): 41-44 (2011)Silicon-aware distributed switch architecture for on-chip networks., , , , and . J. Syst. Archit., 59 (7): 505-515 (2013)Network-on-Chip virtualization in Chip-Multiprocessor Systems., , , and . J. Syst. Archit., 58 (3-4): 126-139 (2012)Towards Efficient Neural Network Model Parallelism on Multi-FPGA Platforms., , and . DATE, page 1-6. IEEE, (2023)GEMM-Like Convolution for Deep Learning Inference on the Xilinx Versal., , , and . ISC Workshops, volume 13999 of Lecture Notes in Computer Science, page 593-604. Springer, (2023)Understanding cache hierarchy interactions with a program-driven simulator., , , and . WCAE, page 30-35. ACM, (2007)Synergistic use of multiple on-chip networks for ultra-low latency and scalable distributed routing reconfiguration., , and . DATE, page 806-811. ACM, (2015)A fast centralized computation routing algorithm for self-configuring NoC systems., , , and . HiPC, page 1-10. IEEE Computer Society, (2011)Transient and Permanent Error Control for High-End Multiprocessor Systems-on-Chip., , , and . NOCS, page 169-176. IEEE Computer Society, (2012)Yield-oriented evaluation methodology of network-on-chip routing implementations., , , , , , , , and . SoC, page 100-105. IEEE, (2009)