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Machine Learning-Based Classification of Hardware Trojans in FPGAs Implementing RISC-V Cores., , , and . ICISSP, page 717-724. SCITEPRESS, (2024)hXDP: Efficient Software Packet Processing on FPGA NICs., , , , , , , , , and . OSDI, page 973-990. USENIX Association, (2020)A Lightweight Security Checking Module to Protect Microprocessors against Hardware Trojan Horses., , , , and . DFT, page 1-6. IEEE, (2021)Towards Dependable RISC-V Cores for Edge Computing Devices., , , , , , , , , and . IOLTS, page 1-7. IEEE, (2023)Built-in Software Obfuscation for Protecting Microprocessors against Hardware Trojan Horses., , and . DFT, page 1-6. IEEE, (2023)Improving the Detection of Hardware Trojan Horses in Microprocessors via Hamming Codes., , , and . DFT, page 1-6. IEEE, (2023)Is RISC-V ready for Space? A Security Perspective., , , , , , and . DFT, page 1-6. IEEE, (2022)Moving forward through the in silico modeling of tuberculosis: a further step with UISS-TB., , , , , , , , , and 1 other author(s). BMC Bioinform., 21-S (17): 458 (2020)Evaluation of the predictive capability of PETAL tool: a retrospective study on potential tyrosine kinases drug resistance targets., , , , and . BIBM, page 1275-1280. IEEE, (2020)Uncertainty quantification and sensitivity analysis for in silico trial platform: a preliminary application on UISS-MS., , , , and . BIBM, page 3299-3302. IEEE, (2021)