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Disambiguation of "Lapuyade, Hervé"

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A Wide-Band High-Speed Sample and Hold in 0.35µm CMOS Technology.

, , , and . LASCAS, page 1-4. IEEE, (2023)

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Lucien Hervé

Luis Pablo Hervé Claude

Yves Hervé

Momo Jeufack Hervé

Hervé Chang

 

Other publications of authors with the same name

A New Laser System for X-Rays Flashes Sensitivity Evaluation., , , , , , and . IOLTW, page 111-. IEEE Computer Society, (2001)A MCU-robust Interleaved Data/Detection SRAM for Space Environments., , , , and . ISVLSI, page 1-6. IEEE, (2023)A Wide-Band High-Speed Sample and Hold in 0.35µm CMOS Technology., , , and . LASCAS, page 1-4. IEEE, (2023)Optimized body-biasing calibration methodology for high-speed comparators in 22nm FDX., , , , , , and . LASCAS, page 1-4. IEEE, (2021)A Low-Power and Low Silicon Area Testable CMOS LNA Dedicated to 802.15.4 Sensor Network Applications., , , , , and . ICECS, page 383-386. IEEE, (2006)An Overview of the Applications of a Pulsed Laser System for SEU Testing., , , , , , , and . IOLTW, page 52-. IEEE Computer Society, (2000)Design of a TID-tolerant low-level offset operational amplifier., , , , , , and . NEWCAS, page 1-4. IEEE, (2013)Design of CMOS integrated circuits for radiation hardening and its application to space electronics., , and . ASICON, page 1-4. IEEE, (2019)Design of a 0.9 V 2.45 GHz Self-Testable and Reliability-Enhanced CMOS LNA., , , , and . IEEE J. Solid State Circuits, 43 (5): 1187-1194 (2008)A (0.75-1.13) mW and (2.4-5.2) ps RMS Jitter Integer-N-Based Dual-Loop PLL for Indoor and Outdoor Positioning in 28-nm FD-SOI CMOS Technology., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (10): 3782-3786 (October 2023)