Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Practical High-Throughput Crossbar Scheduling., and . IEEE Micro, 29 (4): 22-35 (2009)Switch folding: network-on-chip routers with time-multiplexed output ports., , , and . DATE, page 344-349. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Networks-on-Chip With Double-Data-Rate Links., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (12): 3103-3114 (2017)ArrayFlex: A Systolic Array Architecture with Configurable Transparent Pipelining., , , , and . CoRR, (2022)Dynamic Adjustment of Test-Sequence Duration for Increasing the Functional Coverage., , , and . IVSW, page 61-66. IEEE, (2019)2D Error Correction for F/F based Arrays using In-Situ Real-Time Error Detection (RTD)., , , , , , and . DFT, page 1-4. IEEE, (2020)Backlog-Aware Crossbar Schedulers: A New Algorithm and its Efficient Hardware Implementation., and . Hot Interconnects, page 67-74. IEEE Computer Society, (2008)Memristive Oscillatory Circuits for Resolution of NP-Complete Logic Puzzles: Sudoku Case., , , , , , and . ISCAS, page 1-5. IEEE, (2020)DeMM: A Decoupled Matrix Multiplication Engine Supporting Relaxed Structured Sparsity., , , and . IEEE Comput. Archit. Lett., 23 (1): 17-20 (January 2024)Multicast-enabled network-on-chip routers leveraging partitioned allocation and switching., , , and . Integr., (2021)