Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.

Y. Lin, C. Yang, H. Li, and C. Wang. NVMSA, page 1-6. IEEE, (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Lin Yang

Yang Lin

Chia-Lin Lee

Chia-Ching Lin

Other publications of authors with the same name

Thermal/performance characterization of CMPs with 3D-stacked DRAMs under synergistic voltage-frequency control of cores and DRAMs.Y. Chen, C. Yang, P. Lin, and Y. Lu. RACS, page 430-436. ACM, (2015)Cache leakage control mechanism for hard real-time systems.J. Chi, C. Yang, Y. Chen, and J. Chen. CASES, page 248-256. ACM, (2007)HotSpot cache: joint temporal and spatial locality exploitation for i-cache energy reduction.C. Yang, and C. Lee. ISLPED, page 114-119. ACM, (2004)Memory access aware power gating for MPSoCs.Y. Lin, C. Yang, J. Huang, and N. Chang. ASP-DAC, page 121-126. IEEE, (2012)Memory Latency Reduction via Thread Throttling.H. Cheng, C. Lin, J. Li, and C. Yang. MICRO, page 53-64. IEEE Computer Society, (2010)Message from the general co-chairs.D. Garrett, and C. Yang. ISLPED, page 1. IEEE, (2017)A Dense Tensor Accelerator with Data Exchange Mesh for DNN and Vision Workloads.Y. Lin, W. Chen, C. Yang, and S. Chien. ISCAS, page 1-5. IEEE, (2021)Latency sensitivity-based cache partitioning for heterogeneous multi-core architecture.P. Wang, C. Li, and C. Yang. DAC, page 5:1-5:6. ACM, (2016)BioRoute: a network-flow based routing algorithm for digital microfluidic biochips.P. Yuh, C. Yang, and Y. Chang. ICCAD, page 752-757. IEEE Computer Society, (2007)The Impact of Emerging Technologies on Architectures and System-level Management: Invited Paper.J. Henkel, H. Amrouch, M. Rapp, S. Salamin, D. Reis, D. Gao, X. Yin, M. Niemier, C. Zhuo, X. Hu and 2 other author(s). ICCAD, page 1-6. ACM, (2019)

BibSonomy

Disambiguation of "Yang, Chia-Lin"

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.

Please choose a person to relate this publication to

Lin Yang

Lin Yang

Yang Lin

Chia-Lin Lee

Chia-Ching Lin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yang, Chia-Lin"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.

Please choose a person to relate this publication to

Lin Yang

Lin Yang

Yang Lin

Chia-Lin Lee

Chia-Ching Lin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A buffer cache architecture for smartphones with hybrid DRAM/PCM memory.