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Disambiguation of "Sazeides, Yiannakis"

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Modeling the implications of DRAM failures and protection techniques on datacenter TCO.

, , , and . MICRO, page 572-584. ACM, (2015)

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Yiannakis Manoli

Yiannakis Koualis

Yiannakis Laouris

 

Other publications of authors with the same name

To Detect or to Correct?, and . IOLTS, page 35-38. IEEE, (2018)Toward Multi-Layer Holistic Evaluation of System Designs., , , , , and . IEEE Comput. Archit. Lett., 15 (1): 58-61 (2016)Trace Processors., , , and . MICRO, page 138-148. ACM/IEEE Computer Society, (1997)NoCAlert: An On-Line and Real-Time Fault Detection Mechanism for Network-on-Chip Architectures., , , and . MICRO, page 60-71. IEEE Computer Society, (2012)Eliminating energy of same-content-cell-columns of on-chip SRAM arrays., , , , , and . ISLPED, page 181-186. IEEE/ACM, (2011)Measuring and Exploiting Guardbands of Server-Grade ARMv8 CPU Cores and DRAMs., , , , , , , , , and 2 other author(s). DSN Workshops, page 6-9. IEEE Computer Society, (2018)HARPA: Solutions for dependable performance under physically induced performance variability., , , , , , , , , and 5 other author(s). SAMOS, page 270-277. IEEE, (2015)Performance Characterization of Simultaneous Multi-Threading and Index Partitioning for an Online Document Search Application., , and . ISPASS, page 231-240. IEEE, (2020)IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming., , , , , , , , and . MICRO, page 799-814. IEEE, (2022)The Performance Vulnerability of Architectural and Non-architectural Arrays to Permanent Faults., , , and . MICRO, page 48-59. IEEE Computer Society, (2012)