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Другие публикации лиц с тем же именем

High-speed C-testable systolic array design for Galois-field inversion., и . ED&TC, стр. 342-346. IEEE Computer Society, (1997)Optimization of regular expression pattern matching circuits on FPGA., , , и . DATE Designers' Forum, стр. 12-17. European Design and Automation Association, Leuven, Belgium, (2006)A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters., , , , , , , и . Asian Test Symposium, стр. 103-. IEEE Computer Society, (2001)Automatic Generation of Memory Built-in Self-Test Cores for System-on-Chip., , , , , и . Asian Test Symposium, стр. 91-96. IEEE Computer Society, (2001)Hardware/software co-designed accelerator for vector graphics applications., , , , , и . SASP, стр. 108-114. IEEE Computer Society, (2011)A prototype of a wireless-based test system., , , , , , , , , и 2 other автор(ы). SoCC, стр. 225-228. IEEE, (2007)RAMSES: A Fast Memory Fault Simulator., , и . DFT, стр. 165-173. IEEE Computer Society, (1999)Fast DNN-based Mechatronics Prototyping Platform on Robotic Arm Control., , , , и . AICAS, стр. 506. IEEE, (2022)Optimization of Pattern Matching Circuits for Regular Expression on FPGA., , , и . IEEE Trans. Very Large Scale Integr. Syst., 15 (12): 1303-1310 (2007)Application-level embedded communication tracer for many-core systems., , , и . ASP-DAC, стр. 803-808. IEEE, (2015)