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Characterization of memristive Poly-Si Nanowires via empirical physical modelling., , , , и . ISCAS, стр. 1675-1678. IEEE, (2010)Design aspects of carry lookahead adders with vertically-stacked nanowire transistors., , , и . ISCAS, стр. 1715-1718. IEEE, (2010)Memristor-based devices for sensing., , , , и . ISCAS, стр. 2257-2260. IEEE, (2014)Temperature-aware runtime power management for chip-multiprocessors with 3-D stacked cache., , , и . ISQED, стр. 163-170. IEEE, (2014)Synthesis of low-power selectively-clocked systems from high-level specification., и . ACM Trans. Design Autom. Electr. Syst., 5 (3): 311-321 (2000)A Full-Capacity Local RoutingArchitecture for FPGAs (Abstract Only)., , и . FPGA, стр. 281. ACM, (2016)An integrated platform for differential electrochemical and ISFET sensing., , , и . ISCAS, стр. 2875-2878. IEEE, (2016)Kernel-Based Power Optimization of RTL Components: Exact and Approximate Extraction Algorithms., , , , и . DAC, стр. 247-252. ACM Press, (1999)A Sound and Complete Axiomatization of Majority-n Logic., , , и . IEEE Trans. Computers, 65 (9): 2889-2895 (2016)PLEASURE: a computer program for simple/multiple constrained/unconstrained folding of Programmable Logic Arrays., и . DAC, стр. 530-537. ACM/IEEE, (1983)