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Performance analysis of 3-D monolithic integrated circuits.

S. Bobba, A. Chakraborty, O. Thomas, P. Batude, V. Pavlidis, and G. Micheli. 3DIC, page 1-4. IEEE, (2010)

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Vedik Bobba

Diwakar Bobbala

Other publications of authors with the same name

GMS: Generic memristive structure for non-volatile FPGAs.P. Gaillardon, D. Sacchetto, S. Bobba, Y. Leblebici, and G. Micheli. VLSI-SoC, page 94-98. IEEE, (2012)Design of a novel type of on-chip transformer suitable for baluns in customary BICMOS/CMOS technologies.S. Bobba, A. V., T. Mattsson, and S. Nilsson. ECCTD, page 91-94. IEEE, (2005)Process/design co-optimization of regular logic tiles for double-gate silicon nanowire transistors.S. Bobba, P. Gaillardon, J. Zhang, M. Marchi, D. Sacchetto, Y. Leblebici, and G. Micheli. NANOARCH, page 55-60. ACM, (2012)Physical synthesis onto a Sea-of-Tiles with double-gate silicon nanowire transistors.S. Bobba, M. Marchi, Y. Leblebici, and G. Micheli. DAC, page 42-47. ACM, (2012)Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement.J. Zhang, S. Bobba, N. Patil, A. Lin, H. Wong, G. Micheli, and S. Mitra. DAC, page 889-892. ACM, (2010)Towards structured ASICs using polarity-tunable Si nanowire transistors.P. Gaillardon, M. Marchi, L. Amarù, S. Bobba, D. Sacchetto, Y. Leblebici, and G. Micheli. DAC, page 123:1-123:4. ACM, (2013)Synthesis of regular computational fabrics with ambipolar CNTFET technology.M. Marchi, S. Bobba, M. Jamaa, and G. Micheli. ICECS, page 70-73. IEEE, (2010)CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits.S. Bobba, A. Chakraborty, O. Thomas, P. Batude, T. Ernst, O. Faynot, D. Pan, and G. Micheli. ASP-DAC, page 336-343. IEEE, (2011)3.5-D integration: A case study.S. Bobba, P. Gaillardon, C. Seiculescu, V. Pavlidis, and G. Micheli. ISCAS, page 2087-2090. IEEE, (2013)Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs.P. Gaillardon, L. Amarù, S. Bobba, M. Marchi, D. Sacchetto, Y. Leblebici, and G. Micheli. DATE, page 625-630. EDA Consortium San Jose, CA, USA / ACM DL, (2013)

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Disambiguation of "Bobba, Shashikanth"

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Performance analysis of 3-D monolithic integrated circuits.

Please choose a person to relate this publication to

Vedik Bobba

Diwakar Bobbala

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Bobba, Shashikanth"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Performance analysis of 3-D monolithic integrated circuits.

Please choose a person to relate this publication to

Vedik Bobba

Diwakar Bobbala

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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Performance analysis of 3-D monolithic integrated circuits.