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Disambiguation of "Leblebici, Yusuf"

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An efficient synaptic architecture for artificial neural networks.

, , , , , , , , and . NVMTS, page 1-4. IEEE, (2017)

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Yusuf

Erhan Leblebici

Nigem Yusuf

Faisal Yusuf

Sherif Yusuf

 

Other publications of authors with the same name

A low-power, multichannel gated oscillator-based CDR for short-haul applications., , , and . ISLPED, page 107-110. ACM, (2005)Co-Design of ReRAM Passive Crossbar Arrays Integrated in 180 nm CMOS Technology., , , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 6 (3): 339-351 (2016)Copper TSV-based die-level via-last 3D integration process with parylene-C adhesive bonding technique., , and . 3DIC, page 1-5. IEEE, (2016)A stochastic perturbative approach to design a defect-aware thresholder in the sense amplifier of crossbar memories., , , and . ASP-DAC, page 835-840. IEEE, (2009)Breaking the Power-Delay Tradeoff: Design of Low-Power High-Speed MOS Current-Mode Logic Circuits Operating with Reduced Supply Voltage., and . ISCAS, page 1871-1874. IEEE, (2007)Load Optimization of an Inductive Power Link for Remote Powering of Biomedical Implants., , , , , , and . ISCAS, page 533-536. IEEE, (2009)Full-custom CMOS realization of a high-performance binary sorting engine with linear area-time complexity., , and . ISCAS (5), page 453-456. IEEE, (2003)Integrating bio-sensing functions on CMOS chips., , , , , , and . APCCAS, page 548-551. IEEE, (2010)Robust and fault-tolerant circuit design for nanometer-scale devices and single-electron transistors., and . ISCAS (3), page 685-688. IEEE, (2004)Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library., , , , , and . DAC, page 1014-1019. ACM, (2011)