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A Synthesis Method for Quaternary Quantum Logic Circuits., , and . VDAT, volume 7373 of Lecture Notes in Computer Science, page 270-280. Springer, (2012)Fsimac: a fault simulator for asynchronous sequential circuits., , , , and . Asian Test Symposium, page 114-119. IEEE Computer Society, (2000)A Modeling Approach for Addressing Power Supply Switching Noise Related Failures of Integrated Circuit., , , and . DATE, page 1078-1083. IEEE Computer Society, (2004)Flare reduction in EUV Lithography by perturbation of wire segments., , and . VLSI-SoC, page 7-12. IEEE, (2015)A novel architecture for QPSK modulation based on time-mode signal processing., , and . VDAT, page 1-6. IEEE, (2014)Combined instruction and loop parallelism in array synthesis for FPGAs., , and . ISSS, page 165-170. ACM / IEEE Computer Society, (2001)Faster Placer for Island-Style FPGAs., and . ICCTA, page 117-121. IEEE Computer Society, (2007)Physiological Information Leakage: A New Frontier in Health Information Security., , , and . IEEE Trans. Emerg. Top. Comput., 4 (3): 321-334 (2016)Approximate Ternary Quantum Error Correcting Code with Low Circuit Cost., and . ISMVL, page 34-39. IEEE, (2020)Special Session: Quantum Error Correction in Near Term Systems., and . ICCD, page 9-12. IEEE, (2020)