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A 20 Gb/s 3.8 pJ/bit 1: 4 Demux in 45-nm CMOS., , , , , , and . ISCAS, page 1-4. IEEE, (2019)Twelve-bit 20-GHz reduced size pipeline accumulator in 0.25 μm SiGe: C technology for direct digital synthesiser applications., , , , and . IET Circuits Devices Syst., 6 (1): 19-27 (2012)A 50 Gb/s 190 mW Asymmetric 3-Tap FFE VCSEL Driver., , , and . IEEE J. Solid State Circuits, 52 (9): 2422-2429 (2017)A 32 GSps multiplexer with 1 kbit memory for arbitrary signal generation for testing digital-to-analogue converters., , , , , , and . IET Circuits Devices Syst., 8 (6): 459-468 (2014)A 30 Gb/s High-Swing, Open-Collector Modulator Driver in 250 nm SiGe BiCMOS., , , , and . MWSCAS, page 5-8. IEEE, (2018)Opto-electrical analog front-end with rapid power-on and 0.82 pJ/bit for 28 Gb/s in 14 nm FinFET CMOS., , , , and . SoCC, page 253-257. IEEE, (2017)Adaptive high-speed and ultra-low power optical interconnect for data center communications., , , , , , , and . ICTON, page 1-4. IEEE, (2017)Comparison of Segmented and Traveling-Wave Electro-Optical Transmitters Based on Silicon Photonics Mach-Zehnder Modulators., , , , , , , and . PSC, page 1-3. IEEE, (2018)Analysis of a Modified Current Switching Cell for High-Speed Digital-to-Analog Converters., , and . ISCAS, page 1-5. IEEE, (2018)