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A 1-pJ/bit 80-Gb/s $2^15-1$ PRBS Generator With a Modified Cherry-Hooper Output Driver., , and . IEEE J. Solid State Circuits, 54 (7): 2059-2069 (2019)Opto-electrical analog front-end with rapid power-on and 0.82 pJ/bit for 28 Gb/s in 14 nm FinFET CMOS., , , , and . SoCC, page 253-257. IEEE, (2017)A 0.68 pJ/bit inductor-less optical receiver for 20 Gbps with 0.0025 mm2 area in 28 nm CMOS., , and . SoCC, page 35-39. IEEE, (2015)A Mixed-Signal Offset-Compensation System for Multi-Gbit/s Optical Receiver Frontends., , , and . VLSI-SoC, page 46-51. IEEE, (2019)A high-voltage DC bias architecture implementation in a 17 Gbps low-power common-cathode VCSEL driver in 80 nm CMOS., , , and . ISCAS, page 2385-2388. IEEE, (2015)107.5 Gb/s 850 nm multi- and single-mode VCSEL transmission over 10 and 100 m of multi-mode fiber., , , , , , , , , and 2 other author(s). OFC, page 1-3. IEEE, (2016)Design considerations and constraints in silicon based optical on-board interconnects for short range communications., , , , , , , , , and 1 other author(s). ICTON, page 1-4. IEEE, (2017)A 30 Gb/s High-Swing, Open-Collector Modulator Driver in 250 nm SiGe BiCMOS., , , , and . MWSCAS, page 5-8. IEEE, (2018)A High-Speed 130-nm SiGe BiCMOS Integrated Duobinary Driver for Data Rate Capacity Enhancement in VCSEL-Based Optical Links., , , , and . IEEE Access, (2024)Design of a 56 Gbit/s 4-level pulse-amplitude-modulation inductor-less vertical-cavity surface-emitting laser driver integrated circuit in 130 nm BiCMOS technology., , , , and . IET Circuits Devices Syst., 9 (3): 213-220 (2015)