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A High-Efficiency FPGA-based BLAKE-256 Accelerator for Securing Blockchain Networks.

, , , and . MWSCAS, page 1-4. IEEE, (2022)

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ASIC design of 7.7 Gbps multi-mode LDPC decoder for IEEE 802.11ac., , , and . ISCIT, page 259-263. IEEE, (2014)Run-Length Limited Decoding for Visible Light Communications: A Deep Learning Approach., , , and . APCC, page 496-501. IEEE, (2019)ASIC design of MUL-RED Radix-2 Pipeline FFT circuit for 802.11ah system., , , and . COOL Chips, page 1-3. IEEE Computer Society, (2016)Energy-Efficient Unified Multi-Hash Coprocessor for Securing IoT Systems Integrating Blockchain., , , , and . MWSCAS, page 355-359. IEEE, (2023)A Coarse Grained Reconfigurable Architecture for SHA-2 Acceleration., , , and . IPDPS Workshops, page 671-678. IEEE, (2022)Versatile Resource-shared Cryptographic Accelerator for Multi-Domain Applications., , , , , and . ICICDT, page 104-107. IEEE, (2023)CPU Meets VR: A Scalable 3D Representation of Manycores for Behavior Analysis., , , , , , and . CANDAR, page 375-380. IEEE Computer Society, (2016)Robust Deep Learning Approaches for Wireless Communication Systems., , and . ICIT, page 120-125. ACM, (2023)MRCA: Multi-grained Reconfigurable Cryptographic Accelerator for Diverse Security Requirements., , , , , , and . COOL CHIPS, page 1-6. IEEE, (2024)Non-RLL DC-Balance based on a Pre-scrambled Polar Encoder for Beacon-based Visible Light Communication Systems., , , and . CoRR, (2019)