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Routability-driven bump assignment for chip-package co-design., , , and . ASP-DAC, page 519-524. IEEE, (2014)Cost-effective decap selection for beyond die power integrity., , , and . DATE, page 1-4. European Design and Automation Association, (2014)Body-biasing assisted vmin optimization for 5nm-node multi-Vt FD-SOI 6T-SRAM., , , , and . ISQED, page 151-155. IEEE, (2018)DVFS Binning Using Machine-Learning Techniques., , , , , and . ITC-Asia, page 31-36. IEEE, (2018)On effective flip-chip routing via pseudo single redistribution layer., , , , and . DATE, page 1597-1602. IEEE, (2012)DFM/DFY practices during physical designs for timing, signal integrity, and power., , , and . ASP-DAC, page 232-237. IEEE Computer Society, (2007)An Efficient Hamiltonian-cycle power-switch routing for MTCMOS designs., , and . ASP-DAC, page 59-65. IEEE, (2012)Testing methods for detecting stuck-open power switches in coarse-grain MTCMOS designs., , , , , , and . ICCAD, page 155-161. IEEE, (2010)Power-switch routing for reducing dynamic IR drop in multi-domain MTCMOS designs., , , and . VLSI-DAT, page 1-4. IEEE, (2014)Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICs., , , , and . VLSI-DAT, page 1-4. IEEE, (2019)