( en | de | ru )

 

Disambiguation of "Ivanova, Olena"

Author of the publication

copydeleteadd this publication to your clipboard
Co-Embedding Additional Security Data and Obfuscating Low-Level FPGA Program Code.

, , , , and . EWDTS, page 1-5. IEEE, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Olena Kornyeyeva

Olena Trunova

Olena Brovko

Olena Kamenyeva

Olena Tkachenko

 

Other publications of authors with the same name

Combined Use of Equivalent and Non-Equivalent Transformations of FPGA Program Code to Embedding Additional Security Data., , , and . EWDTS, page 1-5. IEEE, (2021)Co-Embedding Additional Security Data and Obfuscating Low-Level FPGA Program Code., , , , and . EWDTS, page 1-5. IEEE, (2020)Increasing the Effective Volume of Digital Watermark Used in Monitoring the Program Code Integrity of FPGA-Based Systems., , , , and . EWDTS, page 1-6. IEEE, (2019)Steganographic Resources of FPGA-based Systems for Approximate Data Processing., , , , and . CMIS, volume 2864 of CEUR Workshop Proceedings, page 324-333. CEUR-WS.org, (2021)Formation of the Interval Stego Key for the Digital Watermark Used in Integrity Monitoring of FPGA-based Systems., , , and . IntelITSIS, volume 2623 of CEUR Workshop Proceedings, page 267-276. CEUR-WS.org, (2020)Evaluating Real Checkability for FPGA-Based Components of Safety-Related Systems., , , , , , and . COLINS, volume 2870 of CEUR Workshop Proceedings, page 1832-1842. CEUR-WS.org, (2021)The Basic Model of Attack Resistance Estimation for Monitoring the Program Code Integrity of the FPGA-Based Systems., , , , and . IDAACS, page 234-238. IEEE, (2019)The Control Technology of Integrity and Legitimacy of LUT-Oriented Information Object Usage by Self-Recovering Digital Watermark., and . ICTERI, volume 1356 of CEUR Workshop Proceedings, page 486-497. CEUR-WS.org, (2015)Development of Checkability in FPGA Components of Safety-Related Systems., , , , and . ICTES, volume 2762 of CEUR Workshop Proceedings, page 30-42. CEUR-WS.org, (2020)Embedding the Digital Watermarks into FPGA-Projects Containing the Adaptive Logic Modules., , , , , and . DESSERT, page 175-179. IEEE, (2019)