From post

Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits.

, , , , , , , и . ASYNC, стр. 80-. IEEE Computer Society, (1998)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

POSTER: BioSEAL: In-Memory Biological Sequence Alignment Accelerator for Large-Scale Genomic Data., , и . PACT, стр. 459-460. IEEE, (2019)Timing optimization in logic with interconnect., , , и . SLIP, стр. 19-26. ACM, (2008)Kin: A High Performance Asynchronous Processor Architecture., и . International Conference on Supercomputing, стр. 433-440. ACM, (1998)PRINS: Resistive CAM Processing in Storage., , и . CoRR, (2018)Sparse Matrix Multiplication On An Associative Processor., , и . CoRR, (2017)Fast Universal Synchronizers., и . PATMOS, том 5349 из Lecture Notes in Computer Science, стр. 199-208. Springer, (2008)Resistive Associative Processor., , , и . IEEE Comput. Archit. Lett., 14 (2): 148-151 (2015)An Extended Metastability Simulation Method for Synchronizer Characterization., и . PATMOS, том 7606 из Lecture Notes in Computer Science, стр. 42-51. Springer, (2012)Using Scan Side Channel for Detecting IP Theft., , , и . HASP@ISCA, стр. 1:1-1:8. ACM, (2016)Parallel VLSI architecture for MAP turbo decoder., , и . PIMRC, стр. 384-388. IEEE, (2002)