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Itanium 2 Processor 6M: Higher Frequency and Larger L3 Cache., , and . IEEE Micro, 24 (2): 10-18 (2004)Power reduction techniques for an 8-core xeon® processor., , , , , , , , , and . ESSCIRC, page 340-343. IEEE, (2009)A 45nm 8-core enterprise Xeon® processor., , , , , , , , and . ISSCC, page 56-57. IEEE, (2009)A 65-nm Dual-Core Multithreaded Xeon® Processor With 16-MB L3 Cache., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 42 (1): 17-25 (2007)Augmenting ESD and EOS physical analysis with per pin ESD and leakage DFT., , , and . ISQED, page 20-24. IEEE, (2018)A 22 nm 15-Core Enterprise Xeon® Processor Family., , , , , , , , , and . IEEE J. Solid State Circuits, 50 (1): 35-48 (2015)5.4 Ivytown: A 22nm 15-core enterprise Xeon® processor family., , , , , , , , , and . ISSCC, page 102-103. IEEE, (2014)A Dual-Core Multi-Threaded Xeon Processor with 16MB L3 Cache., , , , and . ISSCC, page 315-324. IEEE, (2006)A 2.666GT/s 128GB/s 14nm Memory I/O with Jitter and Crosstalk Cancellation., , , , , , and . A-SSCC, page 21-24. IEEE, (2019)ItaniumTM Processor system bus design., , and . IEEE J. Solid State Circuits, 36 (10): 1565-1573 (2001)