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Disambiguation of "Ramachandran, Champaka"

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Combined topological and functionality based delay estimation using a layout-driven approach for high level applications.

, and . EURO-DAC, page 72-78. IEEE Computer Society Press, (1992)

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Harshawardhan Ramachandran

Muthupandi Ramachandran

Sheetal Ramachandran

Vimal Ramachandran

Haribaskar Ramachandran

 

Other publications of authors with the same name

Incorporating the Controller Effects During Register Transfer Level Synthesis., and . EDAC-ETC-EUROASIC, page 308-313. IEEE Computer Society, (1994)On the intrinsic rent parameter and spectra-based partitioning methodologies., , , and . EURO-DAC, page 202-208. IEEE Computer Society Press, (1992)A performance driven logic synthesis system using delay estimator., , , , and . Great Lakes Symposium on VLSI, page 88-92. IEEE, (1994)Accurate layout area and delay modeling for system level design., , , , and . ICCAD, page 355-361. IEEE Computer Society / ACM, (1992)Combined topological and functionality based delay estimation using a layout-driven approach for high level applications., and . EURO-DAC, page 72-78. IEEE Computer Society Press, (1992)An Empirical Study on the Effects of Physical Design in High-Level Synthesis., , , and . VLSI Design, page 11-16. IEEE Computer Society, (1994)LAST: a Layout Area and Shape function esTimator for high level applications., and . EURO-DAC, page 351-355. EEE Computer Society, (1991)Combined topological and functionality-based delay estimation using a layout-driven approach for high-level applications., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 13 (12): 1450-1460 (1994)