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SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems.

, , , , , , , , , , , , , , , , , и . Microprocess. Microsystems, (2017)

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Maher Fakih

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Kamran Maher

 

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Functional test environment for time-triggered control systems in complex MPSoCs., , , , и . Microprocess. Microsystems, (2020)A Hypervisor Architecture for Low-Power Real-Time Embedded Systems., , , , , , и . DSD, стр. 252-259. IEEE Computer Society, (2018)Experimental Evaluation of Scenario Aware Synchronous Data Flow based Power Management., , , , и . COINS, стр. 80-85. ACM, (2019)SAFEPOWER: Application of Power Management Techniques in SoCs for Safety-Relevant Systems., , , , и . COINS, стр. 104-109. ACM, (2019)A Design-flow for implementing, validating and evaluating Machine-learning Classifiers on FPGAs., и . COINS, стр. 86-91. ACM, (2019)SAFEPOWER project: Architecture for safe and power-efficient mixed-criticality systems., , , , , , , , , и 8 other автор(ы). Microprocess. Microsystems, (2017)Probabilistic State-Based RT-Analysis of SDFGs on MPSoCs with Shared Memory Communication., , , , и . DATE, стр. 1715-1720. IEEE, (2019)Towards power management verification of time-triggered systems using virtual platforms., , , , и . SAMOS, стр. 81-88. ACM, (2018)Capturing Neural-Networks as Synchronous Dataflow Graphs., , и . MBMV, стр. 1-10. VDE / IEEE, (2020)