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Disambiguation of "Yalamanchili, Sudhakar"

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A Cost-Effective Hardware Link Scheduling Algorithm for the Multimedia Router (MMR).

, , , , and . ICN (2), volume 2094 of Lecture Notes in Computer Science, page 358-369. Springer, (2001)

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Sudhakar Peddireddi

Padhmanand Sudhakar

Sudhakar Motiram Chaudhari

Yamini Sudhakar Avadhut

 

Other publications of authors with the same name

Centralized buffer router: A low latency, low power router for high radix NOCs., and . NOCS, page 1-8. IEEE, (2013)Algebraic Properties of some Parallel Processor Interconnection Networks., and . ICDE, page 611-618. IEEE Computer Society, (1984)Understanding Energy Aspects of Processing-near-Memory for HPC Workloads., , , and . MEMSYS, page 276-282. ACM, (2015)Near Data Processing: Impact and Optimization of 3D Memory System Architecture on the Uncore., , and . MEMSYS, page 11-21. ACM, (2015)Using rapid prototyping in computer architecture design laboratories., , , and . WCAE@HPCA, page 4. ACM, (1996)Scouting: Fully Adaptive, Deadlock-Free Routing in Faulty Pipelined Networks., , , and . ICPADS, page 608-613. IEEE Computer Society, (1994)On adaptive resource allocation for complex real-time application., , , and . RTSS, page 320-329. IEEE Computer Society, (1997)Neurocube: A Programmable Digital Neuromorphic Architecture with High-Density 3D Memory., , , , and . ISCA, page 380-392. IEEE Computer Society, (2016)Dynamic Partitioned Global Address Spaces for power efficient DRAM virtualization., and . Green Computing Conference, page 485-492. IEEE Computer Society, (2010)Teaching Pipelining and Concurrency using Hardware Description Languages., , , , and . MSE, page 55-56. IEEE Computer Society, (1999)