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Disambiguation of "Shahsavani, Soheil Nazar"

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A thermally-aware energy minimization methodology for global interconnects.

, , , and . DATE, page 1213-1218. IEEE, (2017)

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Nazar Mazurak

Soheil Pourrajabi

Soheil Asgari

Soheil Esfahanian

Soheil Samii

 

Other publications of authors with the same name

A thermally-aware energy minimization methodology for global interconnects., , , and . DATE, page 1213-1218. IEEE, (2017)Accurate margin calculation for single flux quantum logic cells., , and . DATE, page 509-514. IEEE, (2018)A placement algorithm for superconducting logic circuits based on cell grouping and super-cell placement., , and . DATE, page 1465-1468. IEEE, (2018)A heuristic machine learning-based algorithm for power and thermal management of heterogeneous MPSoCs., , , and . ISLPED, page 291-296. IEEE, (2015)A Timing Uncertainty-Aware Clock Tree Topology Generation Algorithm for Single Flux Quantum Circuits., , and . DATE, page 278-281. IEEE, (2020)Efficient Compilation and Mapping of Fixed Function Combinational Logic onto Digital Signal Processors Targeting Neural Network Inference and Utilizing High-level Synthesis., , , and . CoRR, (2022)A Variation-aware Hold Time Fixing Methodology for Single Flux Quantum Logic Circuits., , , , and . ACM Trans. Design Autom. Electr. Syst., 26 (6): 47:1-47:17 (2021)A Hyper-Parameter Based Margin Calculation Algorithm for Single Flux Quantum Logic Cells., and . ISVLSI, page 645-650. IEEE, (2019)TDP-ADMM: A Timing Driven Placement Approach for Superconductive Electronic Circuits Using Alternating Direction Method of Multipliers., and . DAC, page 1-6. IEEE, (2020)NullaNet Tiny: Ultra-low-latency DNN Inference Through Fixed-function Combinational Logic., , , , , and . FCCM, page 266-267. IEEE, (2021)