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Investigation and comparison of thermal distribution in synchronous and asynchronous 3D ICs.

, , , , , and . 3DIC, page 1-5. IEEE, (2009)

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Completion-Completeness for NULL Convention Digital Circuits Utilizing the Bit-Wise Completion Strategy.. VLSI, page 143-149. CSREA Press, (2003)Using a VHDL Testbench for Transistor-Level Simulation and Energy Calculation., and . CDES, page 115-121. CSREA Press, (2005)An FPGA-in-the-loop approach for HDL motor controller verification., , and . ReConFig, page 1-6. IEEE, (2017)Automated energy calculation and estimation for delay-insensitive digital circuits., , , and . Microelectron. J., 38 (10-11): 1095-1107 (2007)Sleep Convention Logic using partially slept function blocks., and . MWSCAS, page 17-20. IEEE, (2013)Hardware Trojan Design and Detection in Asynchronous NCL Circuits., , and . ICECS, page 1-4. IEEE, (2020)Uncle - An RTL Approach to Asynchronous Design., , and . ASYNC, page 65-72. IEEE Computer Society, (2012)Multi-Threshold Asynchronous Circuit Design for Ultra-Low Power., , , , and . J. Low Power Electron., 4 (3): 337-348 (2008)NULL convention multiply and accumulate unit with conditional rounding, scaling, and saturation., , , , and . J. Syst. Archit., 47 (12): 977-998 (2002)Formal modeling and verification for pre-charge half buffer gates and circuits., , and . MWSCAS, page 519-522. IEEE, (2017)