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Disambiguation of "Jas, Abhijit"

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An efficient test vector compression scheme using selective Huffman coding.

, , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 22 (6): 797-806 (2003)

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Abhijit Basu

Christian Jas

Abhijit Majumdar

Gerhard Jas

Abhijit Basu

 

Other publications of authors with the same name

Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller., , , , and . DFT, page 454-462. IEEE Computer Society, (2008)Using an Embedded Processor for Efficient Deterministic Testing of Systems-on-a-Chip., and . ICCD, page 418-. IEEE Computer Society, (1999)Hybrid BIST Based on Weighted Pseudo-Random Testing: A New Test Resource Partitioning Scheme., , and . VTS, page 2-8. IEEE Computer Society, (2001)Function-Inherent Code Checking: A New Low Cost On-Line Testing Approach for High Performance Microprocessor Control Logic., , , , and . ETS, page 171-176. IEEE Computer Society, (2008)Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller., , , , and . IEEE Trans. Computers, 60 (9): 1260-1273 (2011)Configuration self-test in FPGA-based reconfigurable systems., , and . ISCAS (1), page 97-100. IEEE, (1999)The Region-Exhaustive Fault Model., , and . ATS, page 13-18. IEEE, (2007)Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering., , , , and . ASP-DAC, page 486-491. IEEE, (2008)Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors., , , , , , and . Conf. Computing Frontiers, page 113-114. ACM, (2010)Test vector decompression via cyclical scan chains and its application to testing core-based designs., and . ITC, page 458-464. IEEE Computer Society, (1998)