Author of the publication

0.37-pJ/b/dB PAM-4 Transmitter and Adaptive Receiver with Fixed Data and Threshold Levels for 12-m Automotive Camera Link.

, , , , , , and . ESSCIRC, page 475-478. IEEE, (2021)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

1.2V 1.6Gb/s 56nm 6F2 4Gb DDR3 SDRAM with hybrid-I/O sense amplifier and segmented sub-array architecture., , , , , , , , , and 5 other author(s). ISSCC, page 128-129. IEEE, (2009)0.41-pJ/b/dB Asymmetric Simultaneous Bidirectional Transceivers With PAM-4 Forward and PAM-2 Back Channels for 5-m Automotive Camera Link., , , , , and . VLSI Technology and Circuits, page 30-31. IEEE, (2022)A Pixel Driver Design Technique to Obtain a High-Quality Depth Map in Indirect Time-of-Flight Sensors., , , , , , , , , and 1 other author(s). ISOCC, page 31-32. IEEE, (2023)A Baud-Rate Clock and Data Recovery With Collaborative Maximum-Eye Tracking Method., and . ISOCC, page 113-114. IEEE, (2023)Performance Comparison of Clocked Comparators Using Impulse Sensitivity Function., and . ISOCC, page 337-338. IEEE, (2023)A PAM4 Level Mismatch Adjustment Scheme for 48-Gb/s PAM4 Memory Tester Bridge., , , , , , and . A-SSCC, page 1-3. IEEE, (2023)Origin of Hysteresis in CH3NH3PbI3 Perovskite Thin Films, , , , , , , , and . Advanced Functional Materials, 27 (37): n/a--n/a (2017)A three-data differential signaling over four conductors with pre-emphasis and equalization: a CMOS current mode implementation., , and . IEEE J. Solid State Circuits, 41 (3): 633-641 (2006)Design of Energy-Efficient Cryptographically Secure Pseudo-Random Number Generators Using High-Level Synthesis., and . ISOCC, page 351-352. IEEE, (2023)3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS., , , , , , and . ISSCC, page 1-3. IEEE, (2015)