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DNN Engine: A 28-nm Timing-Error Tolerant Sparse Deep Neural Network Processor for IoT Applications., , , and . IEEE J. Solid State Circuits, 53 (9): 2722-2731 (2018)A case for efficient accelerator design space exploration via Bayesian optimization., , , , , , and . ISLPED, page 1-6. IEEE, (2017)A 16-nm SoC for Noise-Robust Speech and NLP Edge AI Inference With Bayesian Sound Source Separation and Attention-Based DNNs., , , , , , , , , and . IEEE J. Solid State Circuits, 58 (2): 569-581 (February 2023)Mobile Machine Learning Hardware at ARM: A Systems-on-Chip (SoC) Perspective., , and . CoRR, (2018)Noisy Machines: Understanding Noisy Neural Networks and Enhancing Robustness to Analog Hardware Errors Using Distillation., , , and . CoRR, (2020)SMAUG: End-to-End Full-Stack Simulation Infrastructure for Deep Learning Workloads., , , , , and . ACM Trans. Archit. Code Optim., 17 (4): 39:1-39:26 (2020)AnalogNets: ML-HW Co-Design of Noise-robust TinyML Models and Always-On Analog Compute-in-Memory Accelerator., , , , , , , , , and . CoRR, (2021)Information contraction in noisy binary neural networks and its implications., , , and . CoRR, (2021)UDC: Unified DNAS for Compressible TinyML Models., , , , , and . CoRR, (2022)Fast and Accurate: Video Enhancement Using Sparse Depth., , , , and . WACV, page 4481-4489. IEEE, (2023)