Author of the publication

Interconnection aspects of spin torque devices: Delay, energy-per-bit, and circuit size modeling.

, and . ISQED, page 736-744. IEEE, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Rakheja, Shaloo
add a person with the name Rakheja, Shaloo
 

Other publications of authors with the same name

Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime., , , , and . CoRR, (2019)Performance modeling for interconnects for conventional and emerging switches., , and . SLIP, page 1-9. IEEE Computer Society, (2013)Polymorphic spintronic logic gates for hardware security primitives - Device design and performance benchmarking., and . NANOARCH, page 131-132. IEEE, (2017)Nanoscale Devices Based on Two-dimensional and Ferroelectric Materials., , , , , , , and . DRC, page 1-2. IEEE, (2022)Modeling of the Charge-Voltage Characteristics of AlScN/AlN/GaN Heterostructures., and . DRC, page 1. IEEE, (2022)Trapping Phenomena in GaN HEMTs with Fe- and C-doped Buffer., , , , and . DRC, page 1-2. IEEE, (2022)Communication limits of on-chip graphene plasmonic interconnects.. ISQED, page 45-51. IEEE, (2017)Large-Signal Modeling of GaN HEMTs using Fermi Kinetics and Commercial Hydrodynamics Transport., , , , , and . DRC, page 1-2. IEEE, (2023)A unified current-voltage and charge-voltage model of quasi-ballistic III-nitride HEMTs for RF applications., and . DRC, page 1-2. IEEE, (2018)Interconnect analysis in spin-torque devices: Performance modeling, sptimal repeater insertion, and circuit-size limits., and . ISQED, page 283-290. IEEE, (2012)