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Proposal For Neuromorphic Hardware Using Spin Devices, , , and . CoRR, (2012)Data-dependant sense-amplifier flip-flop for low power applications., , , , , , , and . CICC, page 1-4. IEEE, (2010)A framework for simulating hybrid MTJ/CMOS circuits: Atoms to system approach., , and . DATE, page 1443-1446. IEEE, (2012)Membrane-dependent neuromorphic learning rule for unsupervised spike pattern detection., , , and . BioCAS, page 164-167. IEEE, (2016)25.1 A Fully Synthesizable Distributed and Scalable All-Digital LDO in 10nm CMOS., , , , , , and . ISSCC, page 380-382. IEEE, (2020)A self-consistent model to estimate NBTI degradation and a comprehensive on-line system lifetime enhancement technique., , and . IOLTS, page 3-8. IEEE Computer Society, (2010)Energy efficient many-core processor for recognition and mining using spin-based memory., , , , and . NANOARCH, page 122-128. IEEE Computer Society, (2011)Low-power functionality enhanced computation architecture using spin-based devices., , , , , and . NANOARCH, page 129-136. IEEE Computer Society, (2011)PETE: A device/circuit analysis framework for evaluation and comparison of charge based emerging devices., , , , and . ISQED, page 80-85. IEEE Computer Society, (2009)A Variation-Adaptive Integrated Computational Digital LDO in 22nm CMOS with Fast Transient Response., , , , , , , and . VLSI Circuits, page 124-. IEEE, (2019)