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Hardware/Software Co-Design, and . Proceedings of the IEEE, (1997)PLEASURE: a computer program for simple/multiple constrained/unconstrained folding of Programmable Logic Arrays., and . DAC, page 530-537. ACM/IEEE, (1983)3.5-D integration: A case study., , , , and . ISCAS, page 2087-2090. IEEE, (2013)Temperature-aware runtime power management for chip-multiprocessors with 3-D stacked cache., , , and . ISQED, page 163-170. IEEE, (2014)Kernel-Based Power Optimization of RTL Components: Exact and Approximate Extraction Algorithms., , , , and . DAC, page 247-252. ACM Press, (1999)An integrated platform for differential electrochemical and ISFET sensing., , , and . ISCAS, page 2875-2878. IEEE, (2016)Saving Power by Synthesizing Gated Clocks for Sequential Circuits., , and . IEEE Des. Test Comput., 11 (4): 32-41 (1994)A Study on the Programming Structures for RRAM-Based FPGA Architectures., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (4): 503-516 (2016)Nonsilicon, Non-von Neumann Computing - Part II., , , , and . Proc. IEEE, 108 (8): 1211-1218 (2020)Nonsilicon, Non-von Neumann Computing - Part I Scanning the Issue., , , , and . Proc. IEEE, 107 (1): 11-18 (2019)